Programmable logic devices (PLDs) are general-purpose circuits that can be programmed by an end user to perform one or more selected functions. Complex PLDs (may also be referred to herein as programmable logic arrays) typically include a number of programmable logic elements and some programmable routing resources. Programmable logic elements have many forms and many names, such as Configurable Logic Blocks (CLBs), logic blocks, logic array blocks, logic cell arrays, macrocells, logic cells, and functional blocks. Programmable routing resources also have many forms and many names.
A field-programmable gate array (FPGA) is a popular type of PLD. FPGAs generally include an array of identical CLB tiles that are programmable both in function and connection to other CLBs. Some PLDs have been proposed that include fixed design memory blocks, such as Random Access Memory (RAM), and Read Only Memory (ROM) that can interface to the CLBs. Still other PLDs have been proposed that include fixed design digital signal processors and general processors that can interface to the CLBs.
However, even general custom-designed signal processors may operate slower and take up more real estate on an integrated circuit than a signal processor that is designed for a more specific task.
One such specific signal processor is a COrdinate Rotation Digital Computer (CORDIC) processor. The CORDIC algorithm performs a few types of specific trigonometric functions based on vector rotations. Minor extensions to the CORDIC algorithm enable linear calculations and hyperbolic calculations of the trigonometric functions.
There is a need for an improved CORDIC processor configured for flexibility to adapt for different applications and data characteristics. Furthermore, there is a need for a CORDIC processor that can be incorporated in a programmable logic array.